/******************************************************************************
******************************************************************************/
void DMA_FOR_AES_IN(unsigned char *src, unsigned char len)
{ halDMADesc_t *ch;
// Setup Tx by DMA.
ch = HAL_DMA_GET_DESC1234( HAL_DMA_CH_HAL_AES_IN ); // The start address of the destination.
HAL_DMA_SET_DEST( ch, HAL_AES_IN_ADDR ); // Using the length field to determine how many bytes to transfer.
HAL_DMA_SET_VLEN( ch, HAL_DMA_VLEN_USE_LEN ); // One byte is transferred each time.
HAL_DMA_SET_WORD_SIZE( ch, HAL_DMA_WORDSIZE_BYTE ); // The bytes are transferred 1-by-1 on Tx Complete trigger.
HAL_DMA_SET_TRIG_MODE( ch, HAL_DMA_TMODE_SINGLE );
HAL_DMA_SET_TRIG_SRC( ch, HAL_DMA_TRIG_ENC_DW ); // The source address is incremented by 1 byte after each transfer.
HAL_DMA_SET_SRC_INC( ch, HAL_DMA_SRCINC_1 );
HAL_DMA_SET_SOURCE(ch, src);
HAL_DMA_SET_LEN(ch, len);
// The destination address is constant - the Tx Data Buffer.
HAL_DMA_SET_DST_INC( ch, HAL_DMA_DSTINC_0 ); // The DMA Tx done is serviced by ISR in order to maintain full thruput.
HAL_DMA_SET_IRQ( ch, HAL_DMA_IRQMASK_DISABLE ); // Xfer all 8 bits of a byte xfer.
HAL_DMA_SET_M8( ch, HAL_DMA_M8_USE_8_BITS ); // DMA has highest priority for memory access.
HAL_DMA_SET_PRIORITY( ch, HAL_DMA_PRI_HIGH );
HAL_DMA_CLEAR_IRQ(HAL_DMA_CH_HAL_AES_IN);
HAL_DMA_ARM_CH(HAL_DMA_CH_HAL_AES_IN);
}
******************************************************************************/
void DMA_FOR_AES_IN(unsigned char *src, unsigned char len)
{ halDMADesc_t *ch;
// Setup Tx by DMA.
ch = HAL_DMA_GET_DESC1234( HAL_DMA_CH_HAL_AES_IN ); // The start address of the destination.
HAL_DMA_SET_DEST( ch, HAL_AES_IN_ADDR ); // Using the length field to determine how many bytes to transfer.
HAL_DMA_SET_VLEN( ch, HAL_DMA_VLEN_USE_LEN ); // One byte is transferred each time.
HAL_DMA_SET_WORD_SIZE( ch, HAL_DMA_WORDSIZE_BYTE ); // The bytes are transferred 1-by-1 on Tx Complete trigger.
HAL_DMA_SET_TRIG_MODE( ch, HAL_DMA_TMODE_SINGLE );
HAL_DMA_SET_TRIG_SRC( ch, HAL_DMA_TRIG_ENC_DW ); // The source address is incremented by 1 byte after each transfer.
HAL_DMA_SET_SRC_INC( ch, HAL_DMA_SRCINC_1 );
HAL_DMA_SET_SOURCE(ch, src);
HAL_DMA_SET_LEN(ch, len);
// The destination address is constant - the Tx Data Buffer.
HAL_DMA_SET_DST_INC( ch, HAL_DMA_DSTINC_0 ); // The DMA Tx done is serviced by ISR in order to maintain full thruput.
HAL_DMA_SET_IRQ( ch, HAL_DMA_IRQMASK_DISABLE ); // Xfer all 8 bits of a byte xfer.
HAL_DMA_SET_M8( ch, HAL_DMA_M8_USE_8_BITS ); // DMA has highest priority for memory access.
HAL_DMA_SET_PRIORITY( ch, HAL_DMA_PRI_HIGH );
HAL_DMA_CLEAR_IRQ(HAL_DMA_CH_HAL_AES_IN);
HAL_DMA_ARM_CH(HAL_DMA_CH_HAL_AES_IN);
}